2. Stability of linearized circuits under realistic assumption

We will work in the frequency domain to perform circuit analysis in this paper. We denote Laplace transforms with uppercase symbols, e.g. $V=V(s)$ is a function of a complex variable $s$ which stands for the Laplace transform of the voltage $v=v(t)$ which is a function of the time $t$.

In the frequency domain, the behavior of a linearized component with $n$ ports is described by an admittance matrix [8][9] of size $n$

where the voltages $V_{1}\ldots V_{n}$ are the node voltages with respect to the chosen reference node. The currents $I_{1}\ldots I_{n}$ are oriented so as to enter electronic components.

We adopt the paradigm that “what happens at very high frequencies is unimportant beyond passivity” and we set up a general definition of “realistic” that translates this requirement in mathematical terms for a large class of models.

In Section 3 we provide examples of realistic component models and show how to verify whether a given model satisfies the definition. In the remainder of this section we prove some important properties of the partial transfer functions $G\left(s\right)$ of circuits which comprise only realistic components. To that end, we compute the effect of $I_{in}$ on the potential $V_{k}$ using nodal analysis [9]. We use nodal analysis because we are exciting the linearised circuit with a small-signal current source. When a small-signal voltage source is used to determine the partial transfer function of the circuit, a mesh analysis can be used to obtain similar results [9]. When a combination of a voltage and current excitation is used, a modified nodal analysis or tableau method will be required to determine the partial transfer function, but this is outside of the scope of this paper.

To perform a nodal analysis we assign to each junction node $j$ a potential $V_{j}$, and to each edge $k$ an electric current $I_{k}$. One of the junction nodes, say $V_{n}$, is the ground (its potential is $0$ by convention). We always assume that the graph associated to the circuit is connected. Specifically, we denote by $\mathbf{V}=(V_{1},\,\dots,\,V_{n-1})^{t}$ the vector of all node voltages (except $V_{n}$, the reference ground voltage) and by $\mathbf{I}=(I_{1},\,\dots,\,I_{p})^{t}$ the vector of all currents in the branches. The (node-branch) incidence matrix of the circuit, say $\mathbf{A}=(A_{ij})$, has $n-1$ rows corresponding to the nodes (except the ground) and $p$ columns corresponding the branches. It is defined by the rule:

Since the graph is connected, $A$ has full row rank ($n-1$) [10]. Kirchhoff’s law gives us

Next, we substitute currents with voltages using relations (2.1). For this, we form the branch admittance matrix, a block diagonal matrix

where the $Y_{j}$ are the admittance matrices of the components in the circuit. With a convenient ordering of nodes and edges, it holds that $\mathbf{I}=\mathbf{Y}_{b}\mathbf{A}^{t}\,\mathbf{V}$, and (2.2) yields

where $I_{{\rm in}}$ is in position $k$ and $\mathbf{Y}(s)$ is a $(n-1)\times(n-1)$ matrix, called nodal admittance matrix, which is related to the branch admittance matrix through ([9] eq. (2.9.8))

The presence of ideal active components like diodes and transistors may result in $\mathbf{Y}$ being singular [7][11] at all frequencies. Suppose that the $Y_k$ are meromorphic functions on $\mathbb{C}$. As meromorphic functions form a field [12], the determinant of a matrix with meromorphic entries is again a meromorphic function. We call therefore invertible as a meromorphic matrix, any meromorphic square matrix with non zero meromorphic determinant. If the $Y_k's$ are supposed to be Y-realistic we will show in next proposition that $\mathbf{Y}$ in Equation (2.4) is invertible as a meromorphic matrix. By Cramer’s rule, we then have:

where $\mathbf{Y}_{j,k}$ denotes the minor of $\mathbf{Y}$ obtained by deleting row $j$ and column $k$. Thus, the voltage at node~$j$ depends linearly on $I_{\text{in}}$ injected at node $k$, and the ratio $V_{j}/I_{in}$ is the partial transfer function or partial frequency response of the circuit at node $j$ from node $k$.